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16 v auto-zero, rail-to-rail output operational amplifiers ad8638/ad8639 rev. f information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007C2010 analog devices, inc. all rights reserved. features low offset voltage: 9 v maximum offset drift: 0.04 v/c maximum rail-to-rail output swing 5 v to 16 v single-supply or 2.5 v to 8 v dual-supply operation high gain: 136 db typical high cmrr: 133 db typical high psrr: 143 db typical very low input bias current: 40 pa maximum low supply current: 1.3 ma maximum ad8639: qualified for automotive applications applications pressure and position sensors strain gage amplifiers medical instrumentation thermocouple amplifiers automotive sensors precision references precision current sensing general description the ad8638/ad8639 are single and dual wide bandwidth, auto-zero amplifiers featuring rail-to-rail output swing and low noise. these amplifiers have very low offset, drift, and bias current. operation is fully specified from 5 v to 16 v single supply (2.5 v to 8 v dual supply). the ad8638/ad8639 provide benefits previously found only in expensive zero-drift or chopper-stabilized amplifiers. using the analog devices, inc., topology, these auto-zero amplifiers combine low cost with high accuracy and low noise. no exter- nal capacitors are required. in addition, the ad8638/ad8639 greatly reduce the digital switching noise found in most chopper- stabilized amplifiers. with a typical offset voltage of only 3 v, drift of 0.01 v/c, and noise of 1.2 v p-p (0.1 hz to 10 hz), the ad8638/ad8639 are suited for applications in which error sources cannot be tolerated. position and pressure sensors, medical equipment, and strain gage amplifiers benefit greatly from nearly zero drift over their operating temperature ranges. many systems can take advantage of the rail-to-rail output swing provided by the ad8638/ad8639 to maximize sign al-to-noise ratio (snr). pin configurations o ut 1 v? 2 +in 3 v+ 5 ?in 4 ad8638 top view (not to scale) 06895-001 figure 1. 5-lead sot-23 (rj-5) nc 1 ?in 2 +in 3 v? 4 nc 8 v+ 7 out 6 nc 5 nc = no connect ad8638 top view (not to scale) 06895-002 figure 2. 8-lead soic_n (r-8) out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ad8639 top view (not to scale) 06895-203 figure 3. 8-lead msop (rm-8) 8-lead soic_n (r-8) pin 1 indicator notes 1. pin 4 and the exposed pad must be connected to v?. ad8639 1 out a 2 ?in a 3 +in a 4 v? 7out b 8v+ 6 ?in b 5 +in b top view (not to scale) 06895-204 figure 4. 8-lead lfcsp_wd (cp-8-5) the ad8638/ad8639 are specified for the extended industrial temperature range (?40c to +125c). the single ad8638 is available in tiny 5-lead sot-23 and 8-lead soic packages. the dual ad8639 is available in 8-lead msop, 8-lead soic, and 8-lead lfcsp packages. see the ordering guide for automotive grades. the ad8638/ad8639 are members of a growing series of auto- zero op amps offered by analog devices (see table 1 ). table 1. auto-zero op amps supply 2.7 v to 5 v 2.7 v to 5 v low power 5 v to 16 v single ad8628 ad8538 ad8638 dual ad8629 ad8539 ad8639 quad ad8630
ad8638/ad8639 rev. f | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics5 v operation................................ 3 electrical characteristics16 v operation ............................. 4 absolute maximum ratings ............................................................ 5 thermal resistance ...................................................................... 5 esd caution .................................................................................. 5 typical performance characteristics ............................................. 6 theory of operation ...................................................................... 14 1/f noise ....................................................................................... 14 input voltage range ................................................................... 14 output phase reversal ............................................................... 14 overload recovery time .......................................................... 14 infrared sensors .......................................................................... 15 precision current shunt sensor ............................................... 15 output amplifier for high precision dacs ........................... 15 outline dimensions ....................................................................... 16 ordering guide .......................................................................... 18 automotive products ................................................................. 18 revision history 6/10rev. e to rev. f changes to features section and general description section . 1 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 18 added automotive products section .......................................... 18 6/09rev. d to rev. e changes to figure 4 .......................................................................... 1 changes to endnote 1 and endnote 2, table 4 ............................. 5 changes to input voltage range section .................................... 14 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 18 12/08rev. c to rev. d changes to endnote 1, table 4 ........................................................ 5 changes to ordering guide .......................................................... 28 5/08rev. b to rev. c added lfcsp_wd package ............................................. universal inserted figure 4; renumbered sequentially ................................ 1 changes to layout ............................................................................ 1 changes to general description .................................................... 1 changes to offset voltage drift for all packages except sot-23 parameter in table 2 ......................................................................... 3 changes to table 5 ............................................................................ 5 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 17 4/08rev. a to rev. b added ad8639 ................................................................... universal added 8-lead msop package ........................................... universal changes to features .......................................................................... 1 changes to general description ..................................................... 1 changes table 2 ................................................................................. 3 changes to table 3 ............................................................................. 4 changes to table 4, added endnote 1 and endnote 2 ................. 5 changes to figure 4 through figure 9 ............................................ 6 changes to figure 11, figure 12, figure 14, and figure 15.......... 7 changes to figure 16 through figure 27 ........................................ 8 changes to figure 28 through figure 33 ..................................... 10 changes to figure 34 through figure 39 ..................................... 11 changes to figure 41 and figure 44............................................. 12 inserted figure 46, figure 47, figure 49, and figure 50; renumbered sequentially ............................................................. 13 changes to figure 51, figure 52, and figure 53 ......................... 15 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 17 11/07rev. 0 to rev. a change to large signal voltage gain specification ...................... 4 11/07revision 0: initial version
ad8638/ad8639 rev. f | page 3 of 20 specifications electrical characteristics5 v operation v sy = 5 v, v cm = v sy /2, t a = 25c, unless otherwise noted. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 3 9 v ?40c t a +125c 23 v ?0.1 v v cm +3.0 v 3 9 v ?40c t a +125c 23 v input bias current i b 1.5 40 pa ?40c t a +85c 7 40 pa ?40c t a +125c 45 105 pa input offset current i os 7 40 pa ?40c t a +85c 7 40 pa ?40c t a +125c 16.5 60 pa input voltage range ?40c t a +125c ?0.1 +3 v common-mode rejection ratio cmrr v cm = 0 v to 3 v 118 133 db ?40c t a +125c 118 db large signal voltage gain a vo r l = 10 k, v o = 0.5 v to 4.5 v 120 136 db ?40c t a +125c 119 db offset voltage drift for all packages except sot-23 ?v os /?t ?40c t a +125c 0.01 0.06 v/c offset voltage drift for sot-23 ?v os /?t ?40c t a +125c 0.04 0.15 v/c input resistance r in 22.5 t input capacitance, differential mode c indm 4 pf input capacitance, common mode c incm 1.7 pf output characteristics output voltage high v oh r l = 10 k to v cm 4.97 4.985 v ?40c t a +125c 4.97 v r l = 2 k to v cm 4.90 4.93 v ?40c t a +125c 4.86 v output voltage low v ol r l = 10 k to v cm 7.5 10 mv ?40c t a +125c 15 mv r l = 2 k to v cm 32 40 mv ?40c t a +125c 55 mv short-circuit current i sc t a = 25c 19 ma closed-loop output impedance z out f = 100 khz, a v = 1 4.2 power supply power supply rejection ratio psrr v sy = 4.5 v to 16 v 127 143 db ?40c t a +125c 125 db supply current per amplifier i sy i o = 0 ma 1.0 1.3 ma ?40c t a +125c 1.5 ma dynamic performance slew rate sr r l = 10 k, c l = 20 pf, a v = 1 2.5 v/s settling time to 0.1% t s v in = 2 v step, c l = 20 pf, r l = 1 k, a v = 1 3 s overload recovery time 50 s gain bandwidth product gbp r l = 2 k, c l = 20 pf, a v = 1 1.35 mhz phase margin m r l = 2 k, c l = 20 pf, a v = 1 70 degrees noise performance voltage noise e n p-p 0.1 hz to 10 hz 1.2 v p-p voltage noise density e n f = 1 khz 60 nv/hz
ad8638/ad8639 rev. f | page 4 of 20 electrical characteristics16 v operation v sy = 16 v, v cm = v sy /2, t a = 25c, unless otherwise noted. table 3. parameter symbol conditions min typ max unit input characteristics offset voltage v os 3 9 v ?40c t a +125c 23 v ?0.1 v v cm +14 v 3 9 v ?40c t a +125c 23 v input bias current i b 1 75 pa ?40c t a +85c 4 75 pa ?40c t a +125c 85 250 pa input offset current i os 20 70 pa ?40c t a +85c 20 75 pa ?40c t a +125c 50 150 pa input voltage range ?40c t a +125c ?0.1 +14 v common-mode rejection ratio cmrr v cm = 0 v to 14 v 127 142 db ?40c t a +125c 127 db large signal voltage gain a vo r l = 10 k, v o = 0.5 v to 15.5 v 130 147 db ?40c t a +125c 130 db offset voltage drift for all packages except sot-23 ?v os /?t ?40c t a +125c 0.03 0.06 v/c offset voltage drift for sot-23 ?v os /?t ?40c t a +125c 0.04 0.15 v/c input resistance r in 22.5 t input capacitance, differential mode c indm 4 pf input capacitance, common mode c incm 1.7 pf output characteristics output voltage high v oh r l = 10 k to v cm 15.94 15.96 v ?40c t a +125c 15.93 v r l = 2 k to v cm 15.77 15.82 v ?40c t a +125c 15.70 v output voltage low v ol r l = 10 k to v cm 30 40 mv ?40c t a +125c 60 mv r l = 2 k to v cm 120 140 mv ?40c t a +125c 200 mv short-circuit current i sc t a = 25c 37 ma closed-loop output impedance z out f = 100 khz, a v = 1 3.0 power supply power supply rejection ratio psrr v sy = 4.5 v to 16 v 127 143 db ?40c t a +125c 125 db supply current per amplifier i sy i o = 0 ma 1.25 1.5 ma ?40c t a +125c 1.7 ma dynamic performance slew rate sr r l = 10 k, c l = 20 pf, a v = 1 2 v/s settling time to 0.1% t s v in = 4 v step, c l = 20 pf, r l = 1 k, a v = 1 4 s overload recovery time 50 s gain bandwidth product gbp r l = 2 k, c l = 20 pf, a v = 1 1.5 mhz phase margin m r l = 2 k, c l = 20 pf, a v = 1 74 degrees noise performance voltage noise e n p-p 0.1 hz to 10 hz 1.2 v p-p voltage noise density e n f = 1 khz 60 nv/hz
ad8638/ad8639 rev. f | page 5 of 20 absolute maximum ratings thermal resistance table 4. parameter rating supply voltage 16 v input voltage gnd ? 0.3 v to v sy+ + 0.3 v input current 1 10 ma differential input voltage 2 v sy output short-circuit duration to gnd indefinite storage temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c table 5. thermal resistance package type ja 1 jc unit 5-lead sot-23 ( rj-5) 230 146 c/w 8-lead soic_n (r-8) 158 43 c/w 8-lead msop (rm-8) 206 44 c/w 8-lead lfcsp_wd (cp -8-5) 2 75 18 c/w ja is specified for the wors t-case conditions, that is, a device soldered in a he application board. 1 circuit board for surface-mount pack ages. this was measured using a standard two-layer board. 2 exposed pad is soldered to t esd caution 1 input pins have clamp diodes to the supply pins. input current should be limited to 10 ma or less whenever input signals exceed either power supply rail by 0.3 v. 2 inputs are protected against high differential voltages by internal 1 k series resistors and back-to-back diode-connected n-mosfets (with a typical v t of 1.25 v for v cm of 0 v). stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ad8638/ad8639 rev. f | page 6 of 20 typical performance characteristics t a = 25c, unless otherwise noted. v os (v) number of amplifiers 1400 0 ?10 10 06895-003 1200 1000 800 600 400 200 ?5 5 0 v sy = 5v 0v v cm +3v figure 5. input offset voltage distribution tcv os (nv/c) number of amplifiers 25 20 15 10 5 0 0 06895-004 4 8 12 16 20 24 28 32 36 40 v sy = 2.5v ?40c t a +125c soic package figure 6. input offset voltage drift distribution v cm (v) v os (v) 10.0 ?10.0 ?0.5 4 06895-005 7.5 5.0 2.5 0 ?2.5 ?5.0 ?7.5 0 0.5 1 1.5 2.0 2.5 3.0 3.5 v sy = 5v ?0.5v v cm +3.9v figure 7. input offset voltage vs. common-mode voltage v os (v) number of amplifiers 6000 4000 5000 2000 3000 1000 0 ?10 ?5 0 5 10 06895-006 v sy = 16v 0v v cm +14v figure 8. input offset voltage distribution tcv os ( n v/ c) number of amplifiers 12 8 10 4 6 2 0 06895-007 v sy = 8v ?40c t a +125c soic package 0 4 8 1216202428323640 figure 9. input offset voltage drift distribution v cm (v) v os (v) 10.0 ?10.0 ?0.5 06895-008 7.5 5.0 2.5 0 ?2.5 ?5.0 ?7.5 14.513.011.510.08.5 7.0 5.54.02.51.0 v sy = 16v ?0.5v v cm +14.5v figure 10. input offset voltage vs. common-mode voltage
ad8638/ad8639 rev. f | page 7 of 20 t a = 25c, unless otherwise noted. temperature (c) i b (pa) 100 10 1 0.1 25 125 100 75 50 v sy = 2.5v 06895-117 figure 11. input bias current vs. temperature load current (ma) output voltage to supply rail (mv) 10k 1k 100 10 1 0.1 0.001 0.1 0.01 1 100 10 0 6895-009 v sy = 2.5v v ol ? v ss v dd ? v oh figure 12. output voltage to supply rail vs. load current v sy = 5v r l = 2k ? temperature (c) output voltage to supply rail (mv) 120 100 80 60 40 20 0 ?40 0 25 ?25 50 75 100 125 0 6895-010 v ol v dd ? v oh figure 13. output voltage to supply rail vs. temperature temperature (c) i b (pa) 100 10 1 0.01 0.1 25 125 100 75 50 v sy = 8v 06895-118 figure 14. input bias current vs. temperature load current (ma) output voltage to supply rail (mv) 10k 1k 100 10 1 0.001 0.1 0.01 1 100 10 0 6895-012 v sy = 8v v ol ? v ss v dd ? v oh figure 15. output voltage to supply rail vs. load current v sy = 16v r l = 2k ? temperature (c) output voltage to supply rail (mv) 250 200 150 100 50 0 ?40 0 25 ?25 50 75 100 125 0 6895-013 v ol v dd ? v oh figure 16. output voltage to supply rail vs. temperature
ad8638/ad8639 rev. f | page 8 of 20 t a = 25c, unless otherwise noted. frequency (hz) gain (db) 120 100 80 60 40 20 0 ?120 ?100 ?80 ?60 ?40 ?20 phase (degrees) 120 100 80 60 40 20 0 ?120 ?100 ?80 ?60 ?40 ?20 1k 10k 100k 1m 10m 06895-016 v sy = 2.5v r l = 2k ? phase gain c l = 200pf c l = 20pf figure 17. open-loop gain and phase vs. frequency frequency (hz) closed-loop gain (db) 60 ?40 1k 10m 0 6895-018 10k 100k 1m 40 20 0 ?20 v sy = 2.5v r l = 2k ? c l = 20pf a v = +1 a v = +10 a v = +100 figure 18. closed-loop gain vs. frequency frequency (hz) z out ( ? ) 1k 10 100 1 0.1 100 1k 10m 06895-100 10k 100k 1m v sy = 2.5v a v = ?100 a v = ?10 a v = +1 figure 19. output im pedance vs. frequency frequency (hz) 1k 10k 100k 1m 10m 06895-017 v sy = 8v r l = 2k ? phase gain c l = 200pf c l = 20pf gain (db) 120 100 80 60 40 20 00 ?120 ?100 ?80 ?60 ?40 ?20 phase (degrees) 120 100 80 60 40 20 ?120 ?100 ?80 ?60 ?40 ?20 figure 20. open-loop gain and phase vs. frequency frequency (hz) closed-loop gain (db) 60 ?40 1k 10m 06895-019 10k 100k 1m 40 20 0 ?20 v sy = 8v r l = 2k ? c l = 20pf a v = +1 a v = +10 a v = +100 figure 21. closed-loop gain vs. frequency frequency (hz) z out ( ? ) 10 100 1 1k 0.1 100 10m 1m 100k 10k 1k 06895-119 v sy = 8v a v = ?100 a v = ?10 a v = +1 figure 22. output im pedance vs. frequency
ad8638/ad8639 rev. f | page 9 of 20 t a = 25c, unless otherwise noted. frequency (hz) cmrr (db) 140 120 100 80 60 40 20 0 100 1k 10k 100k 1m 10m v sy = 2.5v 06895-113 figure 23. cmrr vs. frequency frequency (hz) psrr (db) 120 100 80 60 40 0 20 ?20 10 100 1k 10k 100k 1m 10m 06895-111 psrr+ psrr? v sy = 2.5v figure 24. psrr vs. frequency 80 70 60 50 40 30 20 10 0 10 overshoot (%) 100 1k load capacitance (pf) os+ v sy = 2.5v r l = 10k ? os? 06895-126 figure 25. small signal overshoot vs. load capacitance frequency (hz) cmrr (db) 140 120 100 80 60 40 20 0 100 10m 1m 100k 10k 1k v sy = 8v 06895-120 figure 26. cmrr vs. frequency frequency (hz) psrr (db) 120 100 80 60 40 0 20 ?20 10 100 1k 10k 100k 1m 10m 06895-112 psrr+ v sy = 8v psrr? figure 27. psrr vs. frequency 80 70 60 50 40 30 20 10 0 10 overshoot (%) 100 1k load capacitance (pf) 06895-127 os+ os? v sy = 8v r l = 10k ? figure 28. small signal overshoot vs. load capacitance
ad8638/ad8639 rev. f | page 10 of 20 t a = 25c, unless otherwise noted. 06895-101 time (2s/div) voltage (500mv/div) v sy = 2.5v a v = +1 c l = 200pf r l = 10k ? figure 29. large signal transient response 06895-103 time (2s/div) voltage (50mv/div) v sy = 2.5v a v = +1 c l = 200pf r l = 10k ? figure 30. small signal transient response 06895-132 0.05 0 3 2 1 0 ?1 ?0.05 ?0.10 ?0.15 input voltage input voltage (50mv/div) output voltage (1v/div) output voltage v sy = 2.5v a v = ?100 time (10s/div) figure 31. negative overload recovery 06895-102 time (2s/div) voltage (2v/div) v sy = 8v a v = +1 c l = 200pf r l = 10k ? figure 32. large signal transient response 06895-104 time (2s/div) voltage (50mv/div) v sy = 8v a v = +1 c l = 200pf r l = 10k ? figure 33. small signal transient response 06895-133 0.05 0 10 5 0 ?5 ?0.05 ?0.10 ?0.15 input voltage (50mv/div) output voltage (5v/div) v sy = 8v a v = ?100 input voltage output voltage time (10s/div) figure 34. negative overload recovery
ad8638/ad8639 rev. f | page 11 of 20 t a = 25c, unless otherwise noted. 06895-134 0.15 0.10 1 0 ?1 ?2 ?3 0.05 0 ?0.05 input voltage (50mv/div) output voltage (1v/div) input voltage output voltage v sy = 2.5v a v = ?100 time (10s/div) figure 35. positive overload recovery 06895-136 +2mv 0 ?2mv 1v/di v output input v sy = 2.5v error band time (4s/div) figure 36. positive settling time to 0.1% 06895-138 +2mv 0 ?2mv 1v/di v output input error band v sy = 2.5v time (4s/div) figure 37. negative settling time to 0.1% 06895-135 0.15 0.10 5 0 ?5 ?10 ?15 0.05 0 ?0.05 input voltage input voltage (50mv/div) output voltage (5v/div) output voltage v sy = 8v a v = ?100 time (10s/div) figure 38. positive overload recovery 06895-137 +2mv 0 ?2mv 2v/di v output input error band v sy = 8v time (4s/div) figure 39. positive settling time to 0.1% 06895-139 +2mv 0 ?2mv 2v/di v output input error band v sy = 8v time (4s/div) figure 40. negative settling time to 0.1%
ad8638/ad8639 rev. f | page 12 of 20 t a = 25c, unless otherwise noted. frequency (hz) voltage noise density (nv/ hz) 1k 100 10 1 100 10 1k 10k 25k 06895-114 v sy = 2.5v figure 41. voltage noise density vs. frequency time (seconds) input noise vol t age (0.5v/div) 1.5 1.0 0.5 0 ?1.0 ?0.5 ?1.5 012345678910 06895-043 v sy = 2.5v figure 42. 0.1 hz to 10 hz noise v sy (v) supply current (a) 1250 1000 750 500 250 0 0123 56 4 7 8 9 10 11 12 13 14 15 16 06895-014 +125c +85c +25c ? 40c figure 43. supply current vs. supply voltage 1 100 10 1k 10k 25k frequency (hz) voltage noise density (nv/ hz) 1k 100 10 06895-115 v sy = 8v figure 44. voltage noise density vs. frequency time (seconds) input noise voltage (v) 1.5 1.0 0.5 0 ?1.0 ?0.5 ?1.5 012345678910 06895-044 v sy = 8v figure 45. 0.1 hz to 10 hz noise v sy = 8v v sy = 2.5v temperature (c) supply current (a) 1400 1200 1000 800 600 400 200 0 ?40 5 20 35 50 65 80 95 110 ?25 ?10 125 06895-125 figure 46. supply current vs. temperature
ad8638/ad8639 rev. f | page 13 of 20 t a = 25c, unless otherwise noted. 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 100 1k 10k 100k frequency (hz) channel separation (db) r l = 10k ? v sy = 8v a v = ?10 06895-147 r l = 2k ? figure 47. channel separation vs. frequency 0.1 0.01 0.001 0.0001 10 100 thd + noise (%) 1k 10k 100k frequency (hz) 06895-149 v sy = 8v a v = +1 r l = 2k ? v in = 1v rms v in = 3v rms figure 48. thd + noise vs. frequency v cm (v) i b (pa) 300 250 200 150 50 100 0 ?50 0123456789 16 10 11 12 13 14 15 06895-034 v sy = 16v t a = 125c figure 49. input bias current vs. input common-mode voltage 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 100 1k 10k 100k frequency (hz) channel separation (db) 06895-148 v sy = 8v a v = ?100 r l = 10k ? r l = 2k ? figure 50. channel separation vs. frequency 0.1 0.01 0.001 0.0001 10 100 thd + noise (%) 1k 10k 100k frequency (hz) 06895-150 v s = 8v a v = +1 r l = 10k ? v in = 1v rms v in = 3v rms figure 51. thd + noise vs. frequency
ad8638/ad8639 rev. f | page 14 of 20 theory of operation the ad8638/ad8639 are single-supply and dual-supply, ultrahigh precision, rail-to-rail output operational amplifiers. the typical offset voltage of 3 v allows the amplifiers to be easily configured for high gains without risk of excessive output voltage errors. the extremely small temperature drift of 30 nv/c ensures a minimum offset voltage error over the entire temperature range of ?40c to +125c, making the amplifiers ideal for a variety of sensitive measurement applications in harsh operating environments. the ad8638/ad8639 achieve a high degree of precision through a patented auto-zeroing topology. this unique topology allows the ad8638/ad8639 to maintain low offset voltage over a wide temperature range and over the operating lifetime. the ad8638/ad8639 also optimize the noise and bandwidth over previous generations of auto-zero amplifiers, offering the lowest voltage noise of any auto-zero amplifier by more than 50%. previous designs used either auto-zeroing or chopping to add precision to the specifications of an amplifier. auto-zeroing results in low noise energy at the auto-zeroing frequency, at the expense of higher low frequency noise due to aliasing of wide- band noise into the auto-zeroed frequency band. chopping results in lower low frequency noise at the expense of larger noise energy at the choppi ng frequency. the ad8638/ad8639 use both auto-zeroing and chopping in a patented ping-pong arrangement to obtain lower low frequency noise together with lower energy at the chopping and auto-zeroing frequencies, maximizing the snr for the majority of applications without the need for additional filtering. the relatively high clock frequency of 15 khz simplifies filter requirements for a wide, useful, noise-free bandwidth. the ad8638 is among the few auto-zero amplifiers offered in the 5-lead sot-23 package. this provides significant improve- ment over the ac parameters of previous auto-zero amplifiers. the ad8638/ad8639 have low noise over a relatively wide bandwidth (0 hz to 10 khz) and can be used where the highest dc precision is required. in systems with signal bandwidths ranging from 5 khz to 10 khz, the ad8638/ad8639 provide true 16-bit accuracy, making this device the best ch oice for very high resolution systems. 1/f noise 1/f noise, also known as pink noise, is a major contributor to errors in dc-coupled measurements. this 1/f noise error term can be in the range of several microvolts or more and, when amplified by the closed-loop gain of the circuit, can show up as a large output signal. for example, when an amplifier with 5 v p-p 1/f noise is configured for a gain of 1000, its output has 5 mv of error due to the 1/f noise. however, the ad8638/ad8639 eliminate 1/f noise internally and thus significantly reduce output errors. the internal elimination of 1/f noise is accomplished as follows: 1/f noise appears as a slowly varying offset to ad8638/ad8639 inputs. auto-zeroing corrects any dc or low frequency offset. therefore, the 1/f noise component is essentially removed, leaving the ad8638/ad8639 free of 1/f noise. input voltage range the ad8638/ad8639 are not rail-to-rail input amplifiers; therefore, care is required to ensure that both inputs do not exceed the input voltage range. under normal negative feedback operating conditions, the amplifier corrects its output to ensure that the two inputs are at the same voltage. however, if either input exceeds the input voltage range, the loop opens and large currents begin to flow through the esd protection diodes in the amplifier. these diodes are connected between the inputs and each supply rail to protect the input transistors against an electrostatic discharge event, and they are normally reverse-biased. however, if the input voltage exceeds the supply voltage, these esd diodes can become forward-biased. without current limiting, excessive amounts of current may flow through these diodes, causing permanent damage to the device. if inputs are subject to over- voltage, insert appropriate series resistors to limit the diode current to less than 10 ma maximum. output phase reversal output phase reversal occurs in some amplifiers when the input common-mode voltage range is exceeded. as common-mode voltage is moved outside the common-mode range, the outputs of these amplifiers can suddenly jump in the opposite direction to the supply rail. this is the result of the differential input pair shutting down, causing a radical shifting of internal voltages that results in the erratic output behavior. the ad8638/ad8639 amplifiers have been carefully designed to prevent any output phase reversal if both inputs are main- tained within the specified input voltage range. if one or both inputs exceed the input voltage range but remain within the supply rails, an internal loop opens and the output varies. therefore, the inputs should always be less than at least 2 v below the positive supply. overload recovery time many auto-zero amplifiers are plagued by a long overload recovery time, often in milliseconds, due to the complicated settling behavior of the internal nulling loops after saturation of the outputs. the ad8638/ad8639 are designed so that internal settling occurs within two clock cycles after output saturation happens. this results in a much shorter recovery time, less than 50 s, when compared to other auto-zero amplifiers. the wide bandwidth of the ad8638/ad8639 enhances performance when the parts are used to drive loads that inject transients into the outputs. this is a common situation when an amplifier is used to drive the input of switched capacitor adcs.
ad8638/ad8639 rev. f | page 15 of 20 infrared sensors infrared (ir) sensors, particularly thermopiles, are increasingly used in temperature measurement for applications as wide ranging as automotive climate control, human ear thermometers, home insulation analysis, and automotive repair diagnostics. the relatively small output signal of the sensor demands high gain with very low offset voltage and drift to avoid dc errors. if interstage ac coupling is used, as shown in figure 52 , low offset and drift prevent the output of the input amplifier from drifting close to saturation. the low input bias currents generate minimal errors from the output impedance of the sensor. similar to pressure sensors, the very low amplifier drift with time and temperature eliminates additional errors once the system is calibrated at room temperature. the low 1/f noise improves snr for dc measurements taken over periods often exceeding one-fifth of a second. figure 52 shows a circuit that can amplify ac signals from 100 v to 300 v up to the 1 v to 3 v levels, with a gain of 10,000 for accurate analog-to-digital conversions. 5v to 16v 100k? 10k? 5v to 16v 100v to 300v 100 ? to bias voltage 10k? f c 1.6hz ir detector 100k ? 10f 1/2 ad8639 1/2 ad8639 06895-065 figure 52. ad8639 used as a preamplifier for thermopile precision current shunt sensor a precision current shunt sensor benefits from the unique attributes of auto-zero amplifiers when used in a differencing configuration, as shown in figure 53 . current shunt sensors are used in precision current sources for feedback control systems. they are also used in a variety of other applications, including battery fuel gauging, laser diode power measurement and control, torque feedback controls in electric power steering, and precision power metering. r s 0.1 ? supply i r l 100 ? 100k ? c 5v to 16v 100 ? 100k ? c e = 1000 r s i = 100mv/ma ad8638 06895-066 figure 53. low-side current sensing in such applications, it is desirable to use a shunt with very low resistance to minimize the series voltage drop; this minimizes wasted power and allows the measurement of high currents while saving power. a typical shunt may be 0.1 . at measured current values of 1 a, the output signal of the shunt is hundreds of millivolts, or even volts, and amplifier error sources are not critical. however, at low measured current values in the 1 ma range, the 100 v output voltage of the shunt demands a very low offset voltage and drift to maintain absolute accuracy. low input bias currents are also needed to prevent injected bias current from becoming a significant percentage of the measured current. high open-loop gain, cmrr, and psrr help to maintain the overall circuit accuracy. with the extremely high cmrr of the ad8638/ad8639, the cmrr is limited by the resistor ratio matching. as long as the rate of change of the current is not too fast, an auto-zero amplifier can be used with excellent results. output amplifier for high precision dacs the ad8638/ad8639 can be used as output amplifiers for a 16-bit high precision dac in a unipolar configuration. in this case, the selected op amp needs to have very low offset voltage (the dac lsb is 38 v when operating with a 2.5 v reference) to eliminate the need for output offset trims. input bias current (typically a few tens of picoamperes) must also be very low because it generates an additional offset error when multiplied by the dac output impedance (approximately 6 k). rail-to-rail output provides full-scale output with very little error. output impedance of the dac is constant and code- independent, but the high input impedance of the ad8638/ ad8639 minimizes gain errors. the wide bandwidth of the amplifier also serves well in this case. the amplifier, with a settling time of 4 s, adds another time constant to the system, increasing the settling time of the output. for example, see figure 54 . the settling time of the ad5541 is 1 s. the combined settling time is approximately 4.1 s, as can be derived from the following equation: () ( ) () 2 2 8638 adtdact totalt s s s + = ad5541/ad5542 adr421 ad8638 dgnd *ad5542 only v dd v out ref(reff*) refs* sclk din cs agnd 5v unipolar output ldac* 0.1f 0.1f 2.5 v 62 4 0.1f serial interface 06895-067 5v to 16v 5v to 16v figure 54. ad8638 used as an output amplifier
ad8638/ad8639 rev. f | page 16 of 20 outline dimensions compliant to jedec standards mo-178-aa 121608-a 10 5 0 seating plane 1.90 bsc 0.95 bsc 0.20 bsc 5 123 4 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.20 max 0.08 min 0.50 max 0.35 min 0.55 0.45 0.35 figure 55. 5-lead small outline transistor package [sot-23] (rj-5) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 56. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches)
ad8638/ad8639 rev. f | page 17 of 20 compliant to jedec standards mo-187-aa 100709-b 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 figure 57. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters 112008-a pin 1 indicator (r 0.2) exposed pad bottom view top view 1 4 8 5 index area 3.00 bsc sq seating plane 0.80 0.75 0.70 0.30 0.25 0.18 0.05 max 0.02 nom 0.80 max 0.55 nom 0.20 ref 0.50 bsc coplanarity 0.08 2.48 2.38 2.23 1.74 1.64 1.49 0.50 0.40 0.30 compliant to jedec standards mo-229-weed-4 for proper connection of the exposed pad, refer to the pin configuration sectionofthisdatasheet. figure 58. 8-lead lead frame chip scale package [lfcsp_wd] 3 mm 3 mm body, very very thin, dual lead (cp-8-5) dimensions shown in millimeters
ad8638/ad8639 rev. f | page 18 of 20 ordering guide model 1 , 2 temperature range package description package option branding AD8638ARJZ-R2 ?40c to +125c 5-lead sot-23 rj-5 a1t ad8638arjz-reel ?40c to +125c 5-lead sot-23 rj-5 a1t ad8638arjz-reel7 ?40c to +125c 5-lead sot-23 rj-5 a1t ad8638arz ?40c to +125c 8-lead soic_n r-8 ad8638arz-reel ?40c to +125c 8-lead soic_n r-8 ad8638arz-reel7 ?40c to +125c 8-lead soic_n r-8 ad8639acpz-r2 ?40c to +125c 8-lead lfcsp_wd cp-8-5 a1y ad8639acpz-reel ?40c to +125c 8-lead lfcsp_wd cp-8-5 a1y ad8639acpz-reel7 ?40c to +125c 8-lead lfcsp_wd cp-8-5 a1y ad8639arz ?40c to +125c 8-lead soic_n r-8 ad8639arz-reel ?40c to +125c 8-lead soic_n r-8 ad8639arz-reel7 ?40c to +125c 8-lead soic_n r-8 ad8639armz ?40c to +125c 8-lead msop rm-8 a1y ad8639armz-reel ?40c to +125c 8-lead msop rm-8 a1y ad8639armz-r7 ?40c to +125c 8-lead msop rm-8 a1y ad8639warz ?40c to +125c 8-lead soic_n r-8 ad8639warz-rl ?40c to +125c 8-lead soic_n r-8 ad8639warz-r7 ?40c to +125c 8-lead soic_n r-8 1 z = rohs compliant part. 2 w = qualified for au tomotive applications. automotive products the ad8639w models are available with controlled manufacturing to support the quality and reliability requirements of automotiv e applications. note that these automotive models may have specifications that differ from the commercial models; therefore, desi gners should review the specifications section of this data sheet carefully. only the automotive grade products shown are available for use in automotive applications. contact your local analog devices account representative for specific product ordering information and to obtain the specific automotive reliability reports for these models.
ad8638/ad8639 rev. f | page 19 of 20 notes
ad8638/ad8639 rev. f | page 20 of 20 notes ?2007C2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06895-0-6/10(f)

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